Xen Summit 2026 in Munich: the week RISC-V stopped being hypothetical

Every September, part of the Xen community leaves the mailing lists and Matrix handles behind to spend three days in the same room. This year the room was in Munich, hosted by Renesas, from 15 to 17 September. Fourteen of us from Vates made the trip, while more colleagues joined remotely. Between us, we gave three talks.

Here's what we talked about, what I heard, and why I came back even more excited about RISC-V than when I left.

Why a hypervisor summit is worth the trip

Most of our work with the wider Xen community happens in writing, and that works. However, some topics would take weeks to settle in a chat thread, and some would never come up at all because nobody would think to raise them in the middle of a normal working day. Gather the same people in one place for three days, and those topics surface on their own: over coffee, in a corridor, or at dinner.

Vates helped sponsor the Summit, but it belongs to the Xen community, not to us. Silicon vendors, consultancies, universities, and embedded companies were all in the room. That made the conversations much wider than the ones we have among ourselves.

Our three talks

XCP-ng State of the Union (me, Tuesday 10:00). A round of everything that happened since the Spring Meetup in April: the state of the market, XCP-ng 8.3 LTS and QCOW2, Xen Orchestra 6, the DevOps tooling, then Arm and RISC-V. One figure I was happy to show: Vates authored 104 commits to Xen 4.22, 10.9% of the release, making us its third-largest contributor. More than half of those commits were RISC-V work. The RISC-V slide ended by asking the room directly to come and review the RISC-V patch series, because more reviewers get it upstream faster. About ten people came to find me afterwards (more on that below).

XCP-ng+Xen status update (Teddy Astie, Tuesday 13:30). Teddy walked the audience through the Xen work behind XCP-ng. On x86, that means general improvements, including work in progress on guests with more than 128 vCPUs. On Arm for cloud, XAPI support partly works, and some of it is already upstream. Confidential guests with AMD SEV work experimentally, with patches on the mailing list where help is welcome. He also covered PV-IOMMU, and GPU virtualisation through both virtio-gpu and SR-IOV vGPUs on AMD and Intel cards. Get his slides from the Summit schedule, or watch the talk.

Xen on RISC-V: From Dom0less to xl (Baptiste Le Duc and Oleksii Kurochko, Wednesday 17:00). This is the talk I keep telling people about, so it gets its own section.

The talk that woke the room up

Anyone who has spoken at a conference knows the last slot of day two. The shared dinner is next, the room is tired, and half the audience is already thinking about beer.

Baptiste and Oleksii got the room back despite the slot. Baptiste is a natural showman, and the two of them clearly love this work: their enthusiasm, stubbornness, and plain joy came through in every slide. The audience applauded in the middle of the talk, more than once.

Who was applauding matters. Committers and maintainers: people who already follow the RISC-V port on the mailing list and know every patch series by name. For them, the talk turned Xen on RISC-V from something ethereal into something concrete.

The title sums up the roadmap. Upstream, the port goes dom0less first: Xen builds its guests itself at boot, from a static configuration. Downstream, Baptiste and Oleksii already run guests with several vCPUs, on QEMU and on real hardware: a HiFive Premier P550, and a SpacemiT K3 that a community contributor booted independently. Then comes a full dom0 with the xl toolstack, and that part works too: xl info, xl list, xl create and xl console are all there. They closed the talk with a demo, pre-recorded in case the conference network let them down, creating a guest from dom0 and talking to it through its console.

Baptiste wrote up the P550 story in Xen on RISC-V just ran on real hardware!, including why a core designed before RISC-V International ratified the hypervisor extension made it harder than it sounds. Get their slides from the Summit schedule, or watch the talk.

Why RISC-V needs a type-1 hypervisor now

For years, if you worked with RISC-V, you were probably a hobbyist or doing embedded work, on a small board. That is changing, thanks to a profile.

RVA23 is a ratified set of mandatory extensions, and the hypervisor extension is one of them. Being RVA23 doesn't make a chip fast enough to be a server, but it guarantees what virtualisation needs, in a form software can rely on. Once that baseline exists, hardware built for servers can follow, and a server that can't run a hypervisor is not much use in a datacenter.

So the real question for Xen is: will a type-1 hypervisor be ready when that hardware arrives? That is what Baptiste and Oleksii are working on.

The hallway track

The corridor conversations were at least as exciting as the talks.

The people who came over after my talk had noticed, as one of them put it, my "unbridled enthusiasm" for RISC-V. Fair enough. Among them:

• someone from a university lab that runs real RISC-V hardware in the loop for its CI, which is exactly what a port like ours needs;
• an embedded engineer who would love to see Xen on RISC-V in safety-critical systems one day;
• and, my favourite detail, people swapping links to order RISC-V boards on the spot, because everyone is waiting for hardware.

Friendly, generous, and competitive in the good way: everyone left wanting to push harder.

Why I care

I'm not a visionary, but I've seen this pattern before: about fifteen years ago, Arm went from "interesting" to "real" in a short time, and the people who had their software ready early were the ones who mattered. I think RISC-V can go further than Arm did, because the ISA itself is open.

We've seen enough signals now to say: let's go.

What's next

• The Xen Project has published the talk recordings, including Baptiste and Oleksii's Xen on RISC-V: From Dom0less to xl and Teddy's status update.
• Baptiste and Oleksii's work deserves more than a section in a recap. Baptiste has since given it its own post: Xen boots on the SpacemiT K3: our first RVA23 board!
• If you want to follow the RISC-V port, or answer that call for reviewers, find the patch series on the xen-devel mailing list.

Thanks to the Xen Project team and to Renesas for organising the Summit, and to everyone who came to talk to us.